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<head><meta charset="utf-8"><title>Illegal instructions in PPC machine code · t-compiler/help · Zulip Chat Archive</title></head>
<h2>Stream: <a href="https://rust-lang.github.io/zulip_archive/stream/182449-t-compiler/help/index.html">t-compiler/help</a></h2>
<h3>Topic: <a href="https://rust-lang.github.io/zulip_archive/stream/182449-t-compiler/help/topic/Illegal.20instructions.20in.20PPC.20machine.20code.html">Illegal instructions in PPC machine code</a></h3>

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<a name="217258062"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/182449-t-compiler/help/topic/Illegal%20instructions%20in%20PPC%20machine%20code/near/217258062" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> MarimeGui <a href="https://rust-lang.github.io/zulip_archive/stream/182449-t-compiler/help/topic/Illegal.20instructions.20in.20PPC.20machine.20code.html#217258062">(Nov 19 2020 at 11:40)</a>:</h4>
<p>Hello all, so I was cross-compiling for the PPC architecture, specifically the 750-class of processors.<br>
I have a custom target with "cpu" set to "750".<br>
The build completes but I get illegal instructions in the resulting machine code, only in release (optimization level 3).<br>
Specifically, I get lwsync sprinkled everywhere, while this specific instruction is NOT supported by the 750.<br>
So I was wondering if this was just me being dumb, or if this was a Rust or LLVM bug.<br>
Here is a repo I made that illustrates this problem: <a href="https://github.com/MarimeGui/ppc-ill-example">https://github.com/MarimeGui/ppc-ill-example</a><br>
I am running the latest nightly at the time of writing (825637983 2020-11-18)<br>
Can anyone help me ?</p>



<a name="217294954"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/182449-t-compiler/help/topic/Illegal%20instructions%20in%20PPC%20machine%20code/near/217294954" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> cuviper <a href="https://rust-lang.github.io/zulip_archive/stream/182449-t-compiler/help/topic/Illegal.20instructions.20in.20PPC.20machine.20code.html#217294954">(Nov 19 2020 at 16:32)</a>:</h4>
<p>I'm not sure about 32-bit ppc offhand, but I know the ppc64 target assumes altivec support</p>



<a name="217294965"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/182449-t-compiler/help/topic/Illegal%20instructions%20in%20PPC%20machine%20code/near/217294965" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> cuviper <a href="https://rust-lang.github.io/zulip_archive/stream/182449-t-compiler/help/topic/Illegal.20instructions.20in.20PPC.20machine.20code.html#217294965">(Nov 19 2020 at 16:32)</a>:</h4>
<p><a href="https://github.com/rust-lang/rust/issues/59932">https://github.com/rust-lang/rust/issues/59932</a></p>



<a name="217295991"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/182449-t-compiler/help/topic/Illegal%20instructions%20in%20PPC%20machine%20code/near/217295991" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> cuviper <a href="https://rust-lang.github.io/zulip_archive/stream/182449-t-compiler/help/topic/Illegal.20instructions.20in.20PPC.20machine.20code.html#217295991">(Nov 19 2020 at 16:38)</a>:</h4>
<p>I guess if you're already using a custom target spec, it may be possible, but I'll have to look at what LLVM is doing</p>



<a name="217300303"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/182449-t-compiler/help/topic/Illegal%20instructions%20in%20PPC%20machine%20code/near/217300303" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> cuviper <a href="https://rust-lang.github.io/zulip_archive/stream/182449-t-compiler/help/topic/Illegal.20instructions.20in.20PPC.20machine.20code.html#217300303">(Nov 19 2020 at 17:09)</a>:</h4>
<p><a href="https://github.com/llvm/llvm-project/blob/da8bec47ab8c755c8272ecf79d80c887bca8b781/llvm/lib/Target/PowerPC/PPCInstrInfo.td#L2449-L2452">https://github.com/llvm/llvm-project/blob/da8bec47ab8c755c8272ecf79d80c887bca8b781/llvm/lib/Target/PowerPC/PPCInstrInfo.td#L2449-L2452</a></p>
<div class="codehilite"><pre><span></span><code>def : Pat&lt;(int_ppc_sync),   (SYNC 0)&gt;, Requires&lt;[HasSYNC]&gt;;
def : Pat&lt;(int_ppc_lwsync), (SYNC 1)&gt;, Requires&lt;[HasSYNC]&gt;;
def : Pat&lt;(int_ppc_sync),   (MSYNC)&gt;, Requires&lt;[HasOnlyMSYNC]&gt;;
def : Pat&lt;(int_ppc_lwsync), (MSYNC)&gt;, Requires&lt;[HasOnlyMSYNC]&gt;;
</code></pre></div>



<a name="217300457"></a>
<h4><a href="https://rust-lang.zulipchat.com#narrow/stream/182449-t-compiler/help/topic/Illegal%20instructions%20in%20PPC%20machine%20code/near/217300457" class="zl"><img src="https://rust-lang.github.io/zulip_archive/assets/img/zulip.svg" alt="view this post on Zulip" style="width:20px;height:20px;"></a> cuviper <a href="https://rust-lang.github.io/zulip_archive/stream/182449-t-compiler/help/topic/Illegal.20instructions.20in.20PPC.20machine.20code.html#217300457">(Nov 19 2020 at 17:10)</a>:</h4>
<p>it doesn't look like LLVM knows how to use pre-<code>lwsync</code> processors that only had <code>sync 0</code>, but you can force <code>msync</code>only</p>



<hr><p>Last updated: Aug 07 2021 at 22:04 UTC</p>
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